1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Description of the Prior Art
It is well known to use an MOS semiconductor device in the semiconductor memory cell device, wherein an interface between an insulating film and a semiconductor material substrate is utilized for storing and transferring information. The MOS semiconductor device has a drawback in that the amount of charge Qss at the surface states impedes the enhancement of the information transferring speed and the improvement of noise reduction.
The known one-transistor semiconductor memory device with one capacitor is widely used in the art; however, the dimension of the device is disadvantageously large because the transistor for the gate and the capacitor for storing the electrical charge are arranged on a flat surface of the device.
The so-called merged-type semiconductor memory device is also known in the art. In this device one diffused region is used for inputting and outputting carriers, thereby providing the device with a region common to the source and the drain of the semiconductor device. This memory device is comparatively small in size but its properties, such as the speed of transferring the carriers, are rather inferior to those of the MOS semiconductor memory device.